Hello, my name is
Joydeep Kumar Devnath
Senior Design Engineer, ML Algorithms & Systems
- joydeepkrdevnath@gmail.com
- +91 8638452791
About me
Artist & AI/VLSI Engineer with a passion for math — backed by nearly a decade of experience in deep learning algorithms and 5+ years of industry expertise in AI/ML, compiler design, and hardware-software systems engineering.
I design and code AI algorithms for software/hardware.
With years of experience as an artificial intelligence design engineer, I bring a multidisciplinary focus that spans Gen AI, compiler engineering, and hardware-software co-design.
I specialize in backend compiler pipelines and IR-level model optimization for AI accelerators like Qualcomm’s HTP (Snapdragon processor), with hands-on experience in generative models such as Stable Diffusion and Transformers, as well as BERT variants and GCNs. I follow robust coding practices (MISRA C, PEP8) and have architected multiple production-grade software libraries. I’ve led the development of energy-efficient algorithms for fused deep learning operations, designed quantization-aware training for neural processors, and explored alternative number systems like posit for hardware-friendly inference. Several of my contributions are patent-backed, reflecting a commitment to practical innovation and systems-level thinking. Explore my portfolio to learn more.
Skills
My Experience
Senior Design Engineer, Machine Learning
I work on the Hexagon Tensor Processor (HTP) — a neural processing unit (NPU) purpose-built for accelerating Generative AI workloads across Snapdragon platforms, including the flagship Snapdragon X Series. My contributions span developing deep learning operation kernels, optimizing model graphs, and writing backend IR code that integrates with the HTP compiler pipeline. This role demands continuous engagement with state-of-the-art models and techniques in deep learning and Gen AI, ensuring high-performance deployment on-device.
Senior AI Design Engineer 1
I was a part of an esteemed multidisciplinary team with a focus on life sciences. Leading the software team involved in developing deep learning models, I was also engaged in architecting and designing a compiler for analog compute circuits in this domain.
AI Design Engineer
As a member of an exceptional research and development team under Prof. Boris Murmann, I contributed to patented AI-driven security algorithms. I innovated a power-efficient algorithm for certain fused deep learning layer operations for hardware and filed for a patent (see portfolio). My other contributions span quantization of neural nets and posit numbers.
Junior Research Fellow
I collaborated within an exceptional research team. My focus included studying Neural Network Hardware accelerators, providing mathematical insights into Binary Neural Nets, co-designing a specialized memory architecture, and publishing a paper (see portfolio). I delved into Capsule Networks and explored reinforcement learning.